NVLink, InfiniBand, and UALink: A Full Guide to How AI GPUs Actually Talk

Everything you need to understand how AI GPUs talk in 2026: why NVLink is scale-up and InfiniBand is scale-out, where Ultra Ethernet and UALink fit, and why treating them as substitutes is the expensive mistake.

Share
NVLink vs InfiniBand: A Full Guide

NVLink is not a generic "GPU cable," and InfiniBand is not its rival in the same layer. NVLink is NVIDIA's scale-up fabric: a high-bandwidth, low-latency interconnect that makes a set of GPUs inside a rack-scale domain behave like one accelerator. InfiniBand (and Spectrum-X Ethernet / Ultra Ethernet Transport on the open side) is scale-out: the fabric that connects servers, racks, and halls so those domains can train and serve across a cluster. UALink is an open attempt at the scale-up job. Treating any of these as drop-in substitutes is how a bill of materials buys the wrong switch.

That split exists because modern AI stopped fitting inside one GPU, then stopped fitting inside one eight-GPU box. Mixture-of-experts inference and training push all-to-all traffic across experts sitting on different GPUs. Long-context reasoning and disaggregated serving move KV cache and activations under tight latency budgets. Peak FLOPS on a single die are not enough if tokens stall waiting for another GPU's HBM. You need a fabric that is co-designed with the accelerators for the hot domain, and a separate fabric that can grow to thousands of GPUs across the hall. One cable type cannot honestly do both jobs at the economics operators actually pay.

What changed in 2026 is not that people invented GPU interconnects. Hopper already shipped NVLink 4 domains of eight GPUs. What changed is Blackwell-class NVL72 racks with seventy-two GPUs in one NVLink domain, liquid cooling, and 130 TB/s of rack-level NVLink bandwidth (NVIDIA product positioning); Quantum-X800 InfiniBand and Spectrum-X800 Ethernet as paired scale-out SKUs; Ultra Ethernet Consortium specs in public download; and UALink 1.0 / Common 2.0 specifications available while shipping open scale-up silicon remains the open question. Rubin / NVLink 6 numbers are preliminary on NVIDIA's product page. The useful question is which layer you are buying for, not which acronym won a tweet.

This is the dedicated GPU-interconnect guide. Optical engines that sit on scale-out switch packages are covered in the co-packaged optics full guide. Memory pooling across hosts is CXL, not GPU collectives. The memory cube next to the GPU is HBM; NVLink is how GPUs share that working set across a domain. Why NVL72-class racks ship wet is in the data center liquid cooling guide. How the GPU and HBM sit on a package is TSMC CoWoS. We do not re-derive them here.

Key takeaways

  • NVLink and InfiniBand are different layers, not rival cables. NVIDIA's own scale-up framing is explicit: scale-up makes GPUs inside a domain act as one compute engine; scale-out (Quantum InfiniBand, Spectrum-X Ethernet) connects servers across the data center. Searching "NVLink vs InfiniBand" as if they were substitutes confuses the BOM.
  • NVLink generations double per-GPU bandwidth and grew the domain from 8 to 72 GPUs. Per NVIDIA's NVLink product page: 900 / 1,800 / 3,600 GB/s per GPU for generations 4 / 5 / 6 (Hopper / Blackwell / Rubin), with NVLink Switch domains of 8 / 8 / 72 and aggregate switch bandwidth of 7.2 TB/s, 130 TB/s (NVL72), and 260 TB/s (NVL72). Sixth-generation figures are labeled preliminary and subject to change.
  • GB200 NVL72 is the shipping-class existence proof for rack-scale NVLink. NVIDIA positions 36 Grace CPUs + 72 Blackwell GPUs, liquid-cooled, 13.4 TB HBM3E at rack, 130 TB/s NVLink bandwidth, with scale-out via Quantum-X800 InfiniBand or Spectrum-X800 Ethernet and BlueField-3. Performance multiples versus H100 on that page are NVIDIA claims with projected/subject-to-change footnotes, not independent lab measurements.
  • Ultra Ethernet is the open scale-out bet; Spectrum-X is NVIDIA's Ethernet product. The Ultra Ethernet Consortium publishes Ultra Ethernet Transport (UET) as an Ethernet-based stack for AI and HPC at scale (spec 1.0.x public). Do not conflate the multi-vendor UEC spec with Spectrum-X SKUs.
  • UALink is the open scale-up bet; the 2026 proof is a public spec, not a hall full of shipping pods. UALink 200G 1.0 targets 200G per lane and up to 1,024 accelerators in a pod. Board members include Alibaba, AMD, Apple, Astera Labs, AWS, Cisco, Google, HPE, Intel, Meta, Microsoft, and Synopsys. NVIDIA is not on that board. Common 2.0 / DL-PL 2.0 / manageability specs are progress on paper; product timing is the unsolved problem.
  • CPO, CXL, HBM, liquid cooling, and CoWoS are adjacent, not replacements. CPO is the optical engine on the scale-out switch path, not a copper NVLink substitute today. CXL pools memory. HBM is the cube beside the GPU. Liquid cooling is why dense NVL72 racks ship. CoWoS is the package assembly. Confusing any of them with the scale-up fabric is a category error.

AI GPU interconnects at a glance

Attribute Detail
What it is The fabrics that move tensors, activations, KV cache, and collectives between AI GPUs: NVLink (and UALink as an open attempt) for scale-up inside a domain; InfiniBand and Ethernet/UET for scale-out across servers and racks
What it is not A single "GPU cable" choice; a substitute for HBM, CXL memory pooling, CoWoS packaging, or CPO on the switch; PCIe as the primary GPU-to-GPU fabric inside NVL72-class domains
Core trick Separate the hot, all-to-all domain (scale-up) from the cluster-wide fabric (scale-out) so bandwidth, latency, and topology match the communication pattern
Key hardware GPUs + NVLink Switch trays/spine (or UALink switches when they ship); InfiniBand Quantum-class or Spectrum-X / UET Ethernet NICs and switches; BlueField-class DPUs on NVIDIA stacks; cables/backplanes; liquid-cooled racks for dense domains
Transmission medium Copper-dominated scale-up inside today's NVL72-class racks; copper and optical on scale-out; CPO as a packaging choice on switches, not a drop-in for rack NVLink copper today
Main applications MoE expert parallelism, tensor/pipeline parallelism, rack-scale inference and training domains, cluster-scale data-parallel training, disaggregated serving across nodes
Deployed today NVIDIA NVLink 4/5 domains (Hopper eight-GPU and Blackwell NVL72 volume conversation); Quantum InfiniBand and Spectrum-X Ethernet clusters; UEC and UALink specs public with product maturity still the question for open stacks
Biggest unsolved problem Open scale-up (UALink) and open Ethernet AI transport (UET) matching NVLink/IB operational maturity at hyperscale, plus power, cooling, and cable plant for ever-larger domains

People type "NVLink vs InfiniBand" because both show up on AI cluster diagrams and both move bits between GPUs somehow. The diagram lies by omission. Inside a GB200 NVL72 rack, seventy-two Blackwell GPUs talk over NVLink through NVLink Switch hardware so the rack can act as one large accelerator. Between racks (and nodes outside that domain), traffic rides Quantum-X800 InfiniBand or Spectrum-X800 Ethernet, with BlueField-3 in the NVIDIA networking story. You need both layers for a factory that spans more than one domain. Buying only InfiniBand does not create an NVL72-class all-to-all domain. Buying only NVLink does not interconnect halls.

NVIDIA's blog on NVLink as the scale-up network for AI factories states the split cleanly: scale-out (Quantum InfiniBand, Spectrum-X Ethernet) spans thousands to hundreds of thousands of GPUs; scale-up connects accelerators in one domain with high bandwidth, low latency, and HBM-local working sets. For MoE inference, tokens dispatch to experts, gather, and reorder. If that all-to-all path sits behind a general cluster network, communication overhead can erase the parallelism win. That argues for purpose-built scale-up. It does not argue that InfiniBand disappeared.

PCIe still matters for NICs, some CPUs, and non-NVLink devices. NVIDIA positions NVLink 6 at over 14× PCIe Gen6 per GPU. That comparison is NVIDIA's. PCIe is not gone from the server; it is the wrong mental model for the GPU-to-GPU bus inside a modern NVLink domain.

Use the table on NVIDIA's NVLink page. Do not invent a third column from a slide deck.

Per GPU (NVLink generations 4 / 5 / 6)

Fourth generation Fifth generation Sixth generation
Bandwidth per GPU 900 GB/s 1,800 GB/s 3,600 GB/s
Max links per GPU 18 18 36
Architecture Hopper Blackwell Rubin
Notes Shipping-class for HGX Hopper era Blackwell / GB200 NVL72 era Preliminary specs; may change

NVLink Switch

NVLink 4 Switch NVLink 5 Switch NVLink 6 Switch
GPU domains 8 8 72
GPU-to-GPU bandwidth 900 GB/s 1,800 GB/s 3,600 GB/s
Total aggregate bandwidth 7.2 TB/s 130 TB/s (NVL72) 260 TB/s (NVL72)

Sixth-generation NVLink is described as 3.6 TB/s bidirectional per GPU, connecting 72 GPUs all-to-all in a Vera Rubin NVL72, with aggregate 260 TB/s. The same page notes preliminary specifications subject to change. NVLink Fusion is NVIDIA's path for hyperscalers to attach semi-custom ASICs or CPUs into the NVLink scale-up domain rather than rebuilding the rack fabric from scratch.

The developer blog adds claims that stay labeled as NVIDIA's: roughly 3× lower end-to-end GPU-to-GPU latency and 10× higher packet rate versus off-the-shelf Ethernet alternatives; 130 TFLOPS of in-network compute (SHARP) in a Vera Rubin NVL72 rack; each NVLink 6 switch tray with four switch chips, 28.8 TB/s tray bandwidth, and 14.4 TFLOPS FP8 in-network compute; a spine on the order of 5,000 cables. NVLink-C2C is positioned at 1.8 TB/s coherent CPU-GPU bandwidth (claimed 7× PCIe Gen6). Decode throughput up to 2.3× versus OTS Ethernet in a 72-accelerator domain is simulation-based. A Hopper-to-Blackwell MoE inference-per-watt figure of 50× (including domain expansion from 8 to 72 GPUs plus software) is an NVIDIA figure, not an independent measurement. Roadmap language includes domains up to 1,152 GPUs and future co-packaged optics connectivity. Treat roadmap as roadmap.

Scale-out: InfiniBand Quantum and Spectrum-X

InfiniBand did not vanish when NVL72 posters went up. It remains the credit-based lossless fabric lineage NVIDIA continues as the Quantum product line after the Mellanox acquisition. On GB200 NVL72, Quantum-X800 InfiniBand is one of two named scale-out companions (the other is Spectrum-X800 Ethernet), alongside BlueField-3 DPUs. SHARP-style in-network reductions exist on InfiniBand as well as on NVLink Switch. Operators with large IB fabrics are not being told the technology is obsolete; they are being told the hot domain inside the rack is a different product.

Spectrum-X is NVIDIA's Ethernet product family for AI scale-out: congestion control, telemetry, and scheduling tuned for AI traffic. It is not identical to "plain Ethernet." When NVIDIA lists GB200/GB300 networking as Quantum-X800 or Spectrum-X, that is two scale-out paths beside the same NVLink domain. This guide does not invent an IBTA bandwidth table. If a deck claims "800 Gb/s class" Quantum-X800 ports, attribute that to NVIDIA product positioning.

Ultra Ethernet Transport: the open Ethernet scale-out bet

The Ultra Ethernet Consortium pushes an Ethernet-based open stack for AI and HPC at scale. The key deliverable is Ultra Ethernet Transport (UET): an RDMA-class transport with sender-based congestion control, multipathing, and incast handling for AI collective patterns. Spec 1.0.x is publicly downloadable (1.0.3 appears in August 2026 materials). That is real standards work.

Two category errors to avoid. First, UEC is not Spectrum-X. Spectrum-X is a vendor product; UET is a multi-vendor transport specification. Marketing "Ethernet for AI" can still mean a proprietary congestion stack. Second, a public transport spec is not the same as a mature multi-vendor NIC and switch ecosystem with the operational scar tissue InfiniBand and NVIDIA's Ethernet stack already carry at hyperscale. Prefer UEC's own language for technical claims; treat sponsored market white papers as sponsored if you cite their spend figures.

UALink (Ultra Accelerator Link) standardizes scale-up interconnect between accelerators and switches inside an AI computing pod. UALink 200G 1.0 is public: 200G per lane, up to 1,024 accelerators in a pod. Later public documents include Common 2.0 (in-network compute), a DL/PL 2.0 split so PHY speeds can move without rewriting the common layer, manageability 1.0 (gNMI, YANG, SAI, Redfish-style control), a 128G DL/PL 1.0, and chiplet 1.01 aligned with UCIe 3.0. That is substantial paper progress in 2026.

The consortium board, per public materials and the April 2025 launch-era press, includes Alibaba, AMD, Apple, Astera Labs, AWS, Cisco, Google, HPE, Intel, Meta, Microsoft, and Synopsys. NVIDIA is not on that board. State that as membership, not theater.

This guide does not claim UALink pods are generally available as shipping SKUs in 2026 halls. The specification is public; product timing and silicon maturity are the unsolved problem. Analyst notes that UALink silicon lags NVLink generations are analysis, not foundry wafer counts. Open scale-up is a real multi-vendor bet. Shipping proof in 2026 still centers on NVIDIA NVLink domains.

How the pieces compose in a real rack

GB200 NVL72 (NVIDIA product page). 36 Grace CPUs and 72 Blackwell GPUs in a liquid-cooled rack; NVLink domain of 72 GPUs at 130 TB/s; 13.4 TB HBM3E at rack; Superchip NVLink listed at 3.6 TB/s in the specs table. Scale-out: Quantum-X800 InfiniBand or Spectrum-X800 Ethernet, plus BlueField-3. Headline claims versus H100 (30× LLM inference, 4× training, 25× energy efficiency) are NVIDIA figures with projected/subject-to-change footnotes.

GB300 NVL72. 72 Blackwell Ultra GPUs and 36 Grace CPUs, liquid-cooled, Quantum-X800 or Spectrum-X outside. NVIDIA claims up to 50× AI factory output versus Hopper-based platforms. Vendor claim.

Sibling technologies. HBM is the memory cube on the package; NVLink moves working sets between GPUs that each own HBM. CoWoS assembles GPU and HBM on an interposer. Liquid cooling is why a 72-GPU NVLink spine ships. CPO belongs on scale-out switches, not as a copper NVLink substitute inside today's NVL72 racks. CXL pools memory across hosts; it is not the fabric for NCCL-style GPU collectives inside an NVLink domain.

Comparison: four names, two jobs

NVLink (scale-up) InfiniBand Quantum (scale-out) Spectrum-X / Ultra Ethernet (scale-out) UALink (scale-up, open)
Job Make GPUs in a domain behave as one accelerator Connect nodes/racks/halls on a lossless IB fabric Connect nodes/racks/halls on Ethernet (vendor product and/or UET spec) Open multi-vendor accelerator pod interconnect
Domain size 8 GPUs (NVLink 4/5 switch domains) to 72 (NVLink 6 / NVL72); roadmap claims up to 1,152 Cluster scale (thousands to hundreds of thousands of GPUs in NVIDIA framing) Same cluster-scale role on Ethernet Spec targets up to 1,024 accelerators per pod
Bandwidth class 900 / 1,800 / 3,600 GB/s per GPU (gen 4/5/6); 130 / 260 TB/s NVL72 aggregates (gen 5/6) NVIDIA Quantum-X800 product line; do not invent port tables here Spectrum-X800 product positioning; UET as open transport 200G per lane (UALink 200G 1.0); aggregate pod math depends on shipping silicon
Who controls the spec NVIDIA IBTA + NVIDIA product line after Mellanox UEC (open) vs NVIDIA Spectrum-X (product) UALink Consortium (NVIDIA not on board)
Shipping proof in 2026 Strong: Hopper NVLink domains; Blackwell NVL72 volume conversation Strong: large IB AI/HPC fabrics continue Spectrum-X deployments in NVIDIA stacks; UET as public spec with ecosystem still maturing Spec public; general availability of pods not assumed here
Openness Proprietary fabric + Fusion for semi-custom attach Industry IB ecosystem with NVIDIA as dominant AI supplier Ethernet open at the wire; AI transport openness is the UEC bet Designed as open scale-up
Typical mistake Treating NVLink as optional when MoE all-to-all is in the hot path Treating IB as a substitute for the scale-up domain Conflating Spectrum-X SKUs with the UEC specification Counting a PDF as a deployed fabric

Thermal, power, and the boring constraints

NVL72-class domains are liquid-cooled for a reason. Seventy-two GPUs, Grace CPUs, NVLink Switch trays, and a copper spine measured in thousands of cables are a thermal and mechanical plant, not a PCIe riser conversation. Scale-up bandwidth at this density presupposes a cooling design that can clear the rack; details live in the liquid cooling guide. Air-cooled eight-GPU boxes were a different regime.

Cable plant and serviceability are first-class. NVIDIA's NVLink 6 narrative emphasizes control-plane resilience, partially populated racks, hot-swappable switch trays, and in-service updates because a failed tray should not equal a dead factory module. At rack-scale domain prices, fabric maintainability is part of performance. Power distribution (higher-voltage rack feeds) is adjacent infrastructure, not an interconnect protocol. Interconnect roadmaps that ignore megawatts per row are incomplete.

A realistic timeline

Horizon What is actually happening Confidence
Now (2026) NVLink 5 / Blackwell NVL72 in the volume conversation; NVLink 6 / Rubin preliminary specs on NVIDIA's page; Quantum-X800 and Spectrum-X as NVIDIA's two scale-out SKUs beside NVL72; UALink 1.0 and 2.0-family specs public; UEC 1.0.x public. Shipping proof is NVIDIA NVLink domains and IB/Ethernet clusters. UALink/UEC product maturity is the question mark. High for NVIDIA shipping classes and public specs; medium for open-stack deployment depth
Near term (2027-2028) Broader Ethernet AI fabrics; UALink silicon if vendors tape out and qualify; possible CPO volume on scale-out switches; larger NVLink domains only as NVIDIA ships them Medium, roadmap-tied
Medium term (2028-2031) NVIDIA roadmap language of domains toward 1,152 GPUs; open scale-up if UALink lands in real pods; more optics in scale-out Speculative on dates; directional on pressure for larger domains and open options

The bottom line

2026 is the year the industry stopped having an excuse to confuse scale-up with scale-out. NVLink (and UALink on the open side) is how GPUs inside a domain share a working set at bandwidths PCIe does not offer. InfiniBand Quantum and Ethernet (Spectrum-X as product, Ultra Ethernet Transport as open bet) are how those domains become a cluster. GB200/GB300 NVL72-class racks are the concrete NVIDIA pattern: liquid-cooled 72-GPU NVLink domains with Quantum-X800 or Spectrum-X outside. UALink and UEC contest proprietary lock-in at each layer. Specs are real. Shipping proof is uneven.

Ask two questions in order. What is the size and latency budget of the hot accelerator domain, and which scale-up fabric implements it? What scale-out fabric ties domains into a cluster, and are you buying InfiniBand, a vendor Ethernet AI stack, or an Ultra Ethernet path? If a vendor answers with one acronym, ask which layer it is. The expensive mistake is still buying a scale-out switch for a scale-up job, or treating an open PDF as a deployed copper spine.

Frequently asked questions

NVIDIA's scale-up interconnect for high-bandwidth GPU-to-GPU communication inside a server or rack-scale domain, extended by NVLink Switch chips into all-to-all domains (8 GPUs on NVLink 4/5 switch generations, 72 on NVLink 6 / NVL72 per NVIDIA's tables).

Different jobs. NVLink is scale-up inside a domain. InfiniBand (Quantum line) is scale-out between nodes and racks. NVL72 systems use NVLink inside the rack and InfiniBand or Spectrum-X Ethernet outside. They are complementary in NVIDIA's architecture, not substitutes.

PCIe is the general peripheral interconnect. NVLink is a purpose-built GPU fabric with much higher per-GPU bandwidth in NVIDIA's product tables (NVLink 6 positioned at over 14× PCIe Gen6). PCIe remains how many NICs and devices attach; it is not the primary GPU-to-GPU path inside NVL72-class domains.

Ultra Accelerator Link: an open consortium specification for scale-up links between accelerators and switches in an AI pod (200G per lane, up to 1,024 accelerators in the 1.0 framing). Specs are public; do not assume general product availability in 2026 halls without a verified shipping SKU.

What is Ultra Ethernet versus InfiniBand?

Both target scale-out. InfiniBand is a long-standing lossless fabric lineage (NVIDIA Quantum in AI clusters). Ultra Ethernet Consortium work defines Ethernet-based transport (UET) for AI/HPC. Spectrum-X is NVIDIA's Ethernet product; UEC is the multi-vendor spec. Do not conflate product and standard.

Switch silicon (and trays) that connect many NVLink ports so GPUs in a domain get all-to-all connectivity at NVLink rates, with SHARP engines for in-network reductions. Aggregate bandwidth figures (7.2 TB/s, 130 TB/s NVL72, 260 TB/s NVL72) are NVIDIA's published switch generation numbers.

NVIDIA's offering for hyperscalers to attach semi-custom ASICs or CPUs into the NVLink scale-up and rack-scale architecture instead of building a full custom scale-up stack alone.

No. Co-packaged optics sits on the scale-out switch packaging path. It does not replace copper NVLink scale-up inside today's NVL72-class racks. See the CPO full guide.

Does CXL replace GPU interconnects?

No. CXL addresses memory pooling and expansion across hosts. It is not the fabric for GPU collectives inside an NVLink domain. See the CXL memory pooling guide.

Methodology

Primary sources as of 31 August 2026: NVIDIA's NVLink product page (generational bandwidth, links, architectures, switch domains/aggregates; preliminary note on NVLink 6; Fusion); GB200 NVL72 (36 Grace + 72 Blackwell, 130 TB/s NVLink, 13.4 TB HBM3E, Quantum-X800 / Spectrum-X800 / BlueField-3, GB300 summary, vendor H100 comparisons with projected/subject-to-change footnotes); developer blog NVIDIA NVLink: The Scale-Up Network for AI Factories (scale-up vs scale-out, latency/packet-rate and in-network compute claims, tray/spine figures, NVLink-C2C, Fusion, 1,152-GPU roadmap, simulation-based decode comparison); UALink specifications; Ultra Ethernet Consortium materials and spec 1.0.x for UET. Bandwidth, latency, packet-rate, and tokens-per-watt comparisons versus Ethernet or Hopper are NVIDIA claims or simulations unless stated otherwise. UALink/UEC product availability is not a foundry wafer table; public specs are not hall-scale deployment proof. No independent IBTA port-speed table was built for this guide.