AI
Everything you need to understand GDDR7 in 2026: JEDEC JESD239 PAM3 signaling, up to 192 GB/s per device, Micron and Samsung shipping speeds, how RTX 50 and Rubin CPX use it, and why board-level GDDR is not a substitute for HBM on an interposer.
AI
Everything you need to understand PCIe 6.0 in 2026: 64 GT/s PAM4, 256 GB/s x16, FLIT mode, FEC/CRC, L0p power, how it differs from NVLink and NVLink-C2C, where Blackwell still uses Gen6 for NICs and host attach, and why PCIe is not the GPU-to-GPU fabric.
Photonics
Everything you need to understand silicon photonics in 2026: SOI waveguides, Mach-Zehnder and micro-ring modulators, Ge detectors, laser integration, foundries (GF Fotonix, TSMC COUPE, Intel), optical I/O vs CPO vs pluggables, and an honest timeline for GPU-package light.
AI
Everything you need to understand how AI GPUs talk in 2026: why NVLink is scale-up and InfiniBand is scale-out, where Ultra Ethernet and UALink fit, and why treating them as substitutes is the expensive mistake.
Semiconductors
Everything you need to understand hybrid bonding in 2026: why microbumps ran out of pitch, how Cu-Cu bonding works, TSMC SoIC vs Intel Foveros Direct, face-to-face density, and why 3D stacking is now a volume technology.
Semiconductors
Everything you need to understand High-NA EUV in 2026: 0.55 vs 0.33 NA, anamorphic 4×/8× optics, 8 nm vs 13 nm, EXE:5000/5200B, Intel’s 18A beachhead, TSMC’s Low-NA bet, and why most chips still print on 0.33.
Semiconductors
Everything you need to understand SiC and GaN in 2026 AI racks: why silicon MOSFETs stall above 100 kW, where wide-bandgap switches sit in PSUs, bus converters, hot-swap and UPS, Infineon/Wolfspeed/Navitas/EPC/ST, and why 800 VDC is a 2027 architecture not a 2026 hall.
Semiconductors
Everything you need to understand backside power in 2026: why front-side grids ran out of room at GAAFET pitches, how BSPDN (buried rails, nano-TSVs, backside metal) works, Intel PowerVia vs TSMC Super Power Rail vs Samsung SF2Z, and what ships versus slides.
Semiconductors
Everything you need to understand glass core substrates in 2026: why ABF organic cores warp as CoWoS packages grow, what a through-glass via is, Intel’s EMIB-on-glass demos versus Absolics samples, and why this is not CoWoS.
Semiconductors
Everything you need to understand Compute Express Link in 2026: CXL.io vs CXL.cache vs CXL.mem, Type 1/2/3 devices, pooling vs sharing vs tiering, why AI servers care, and why Type-3 cards ship while a general CXL fabric does not.
Semiconductors
Everything you need to understand TSMC CoWoS in 2026: CoWoS-S vs CoWoS-L vs CoWoS-R, why NVIDIA, AMD, and Broadcom fight for allocation, and why the assembly slot — not the transistor node — gates AI GPUs.
Semiconductors
Everything you need to understand why 2026 leading-edge logic wraps the gate around the channel: why FinFET ran out of room, how a nanosheet GAAFET works, Intel 18A / TSMC N2 / Samsung SF2, backside power, and what angstrom marketing does not mean.