> ## Content Index > Fetch the complete content index at: https://www.insidedeeptech.com/llms.txt > Use this file to discover other available public pages before exploring further. # Ultra Ethernet: A Full Guide to AI Scale-Out Fabric After InfiniBand - URL: https://www.insidedeeptech.com/ultra-ethernet-uec-ai-networking-full-guide/ - Published: 2026-09-16T06:19:31.000Z - Updated: 2026-09-16T06:19:31.000Z - Description: Ultra Ethernet Consortium Spec 1.0.3 (July 2026): UET transport, AI Base/AI Full/HPC profiles, NSCC/RCCC congestion, packet spraying, and honest limits versus InfiniBand, RoCE, and UALink. - Author: Austin Heaton - Tags: AI, Hardware, Semiconductors InfiniBand still wins plenty of AI training clusters. Ethernet still wins the rest of the data center. Ultra Ethernet is the open attempt to close that gap on the scale-out backend without forcing operators into a proprietary fabric for every GPU pod. This guide covers what the Ultra Ethernet Consortium (**UEC**) actually specified, how Ultra Ethernet Transport (**UET**) works, the AI Base / AI Full / HPC profiles, congestion control (NSCC and RCCC), packet spraying, how it sits next to InfiniBand, RoCE, UALink, and NVLink, who is shipping compliant silicon, and the honest limits that keep InfiniBand and proprietary Ethernet stacks on the same BOM. ## Key Takeaways - UEC publishes an open Ethernet stack for AI and HPC scale-out; Spec 1.0.3 (16 July 2026) is current. - UET adds AI-oriented transport on Ethernet: ephemeral PDCs, spraying, and modern congestion control. - Profiles split complexity: AI Base, AI Full, and HPC (matching and MPI-class features). - NSCC (sender signals) and RCCC (receiver credits) handle fabric congestion and incast; they can run together. - Ultra Ethernet is scale-out Ethernet, not a substitute for NVLink/UALink scale-up or a drop-in InfiniBand clone. 📌 Scope note: Ultra Ethernet here means the UEC specification stack (software through PHY) centered on UET for backend AI/HPC fabrics. It is not RoCEv2 marketing, not Spectrum-X as a product line, and not UALink. Claims are dated as of September 2026 and cite Ultra Ethernet Specification v1.0.3, the UEC site, the authors' arXiv overview (2508.08906), and Broadcom's Thor Ultra primary materials. ## What Ultra Ethernet actually is UEC is a Linux Foundation Joint Development Foundation project. Its mission, stated on [ultraethernet.org](https://ultraethernet.org/?ref=insidedeeptech.com), is an Ethernet-based, open, interoperable, high-performance full-communications stack for AI and HPC at scale. The public baseline is the Ultra Ethernet Specification. Version 1.0 shipped 11 June 2025\. Maintenance releases followed (1.0.1 on 5 September 2025, 1.0.2 in January 2026). **Specification v1.0.3**, dated 16 July 2026 and published at [UE-Specification-1.0.3.pdf](https://ultraethernet.org/wp-content/uploads/sites/20/2026/08/UE-Specification-1.0.3.pdf?ref=insidedeeptech.com), is the current published reference on the consortium's [specification history](https://ultraethernet.org/specification-history/?ref=insidedeeptech.com) page. The [1.0.3 release notes](https://ultraethernet.org/wp-content/uploads/sites/20/2026/07/UE-Specification-1.0.3-release-notes-.pdf?ref=insidedeeptech.com) add support for 200 Gb/s per lane signaling, a new negotiation control-packet type for boolean features, and corrections across transport, link layer (including CBFC/LLR race conditions), and PHY control ordered sets. Here's why that matters. Operators are not buying "faster Ethernet" as a slogan. They are buying a documented transport and congestion model that can run on multi-vendor Ethernet ASICs, NICs, and optics while targeting collective-heavy AI traffic. UE 1.0 aims mainly at the **backend / scale-out** network that connects GPU or XPU nodes across a fabric. It is not positioned as the primary answer for local scale-up inside a tray (that is NVLink, UALink, and related designs). Inside Deep Tech's [NVLink, InfiniBand, and UALink full guide](https://www.insidedeeptech.com/nvlink-infiniband-ualink-ai-gpu-interconnect-full-guide/) maps that three-layer split; this article stays on the Ultra Ethernet scale-out path. ## UET: the transport that makes Ethernet act like an AI fabric The standout layer is **Ultra Ethernet Transport (UET)**. Authors of the specification summarize the design in [arXiv:2508.08906](https://arxiv.org/abs/2508.08906?ref=insidedeeptech.com) (Ultra Ethernet's Design Principles and Architectural Innovations). Key properties: - Ephemeral Packet Delivery Contexts (PDCs) instead of heavyweight, long-lived queue-pair style connections. Context can start with the first data packet, which cuts handshake latency and NIC state for short jobs and many-to-many collectives. - Semantic layer (SES) for tagged send/receive, RMA, and matching semantics usable by libfabric, MPI, and collective libraries (\*CCLs). - Delivery modes that cover ordered and unordered, reliable and unreliable paths. Reliable Unordered Delivery is the preferred bulk path when you want per-packet multipathing without forcing a large reorder buffer at the receiver. - Packet spraying: each packet can carry a different Entropy Value (EV) so ECMP hashes spread load across many equal-cost paths. - Lossy-friendly recovery with optional packet trimming and fast loss detection, so the fabric can avoid classic lossless PFC head-of-line pathologies while still recovering quickly. - Integrated security (transport security / authentication of addressing) so spoofing fabric addresses is harder than on naive RDMA Ethernet. UET is designed so vendors can ship hardware-accelerated NICs, software-heavy stacks, or mixed implementations. That is deliberate: Ethernet ecosystems do not move as a single ASIC generation. ## Profiles: AI Base, AI Full, and HPC UET does not force every NIC to implement every HPC feature. Spec profiles carve complexity: | Profile | Aimed at | Notable features | Honest catch | | ------- | ------------------------------ | ------------------------------------------------ | ----------------------------- | | AI Base | Lowest-complexity AI / CCL | Core UET; matching can live in software | Least silicon feature surface | | AI Full | AI collectives needing offload | Deferrable send, exact match, atomics | More NIC complexity | | HPC | MPI / OpenSHMEM-class | AI Full minus deferrable send; wildcard matching | Heaviest semantic surface | The [specification text](https://ultraethernet.org/wp-content/uploads/sites/20/2026/08/UE-Specification-1.0.3.pdf?ref=insidedeeptech.com) states AI Base for current and future AI applications that need high performance at the lowest cost; AI Full adds deferrable send, exact match, and atomics; HPC addresses high-performance computing and includes AI Full features except deferrable send. Deferrable send matters for \*CCL offload: the receiver can defer large unexpected messages instead of forcing a classic rendezvous or pure software receiver-initiated path. HPC keeps wildcard matching that MPI programs expect. AI Base lets implementers push matching into the provider or CCL when silicon budget is tight. 💡 Inside Deep Tech's take: treat profile choice as a BOM and software-stack decision, not a marketing badge. Buying "UEC Ethernet" without knowing whether you need AI Base, AI Full, or HPC matching is how clusters get NICs that cannot offload the collective path you actually run. ## Congestion control: NSCC and RCCC AI fabrics fail on tail latency when incast and ECMP collisions meet shallow buffers. UET's congestion management subsystem combines two complementary algorithms. **Network-Signaled Congestion Control (NSCC)** runs at the sender. It uses ECN marks from switches as a fast one-bit congestion signal; RTT / queue-delay style multi-bit feedback on ACKs; trimmed-packet signals when the fabric indicates congestion on a path; and in-flight byte windows so the source paces against measured network state. NSCC classifies ACK outcomes (ECN versus no ECN, low versus high RTT) and adjusts the congestion window. It also includes quick-adapt logic aimed at sudden bottlenecks such as receiver incast or a hot switch hop. **Receiver Credit-based Congestion Control (RCCC)** is optional and receiver-driven. The receiver grants credits across active senders so aggregate last-hop ingress matches what the endpoint can ingest. That is the direct answer to many-to-one incast that sender-only schemes only guess at. NSCC is typically always available on a UE NIC path; RCCC can be enabled so a deployment runs NSCC alone, RCCC alone, or both. Arista's [Demystifying Ultra Ethernet](https://www.arista.com/assets/data/pdf/Whitepapers/Demystifying-Ultra-Ethernet-WP.pdf?ref=insidedeeptech.com) white paper describes the same split: ephemeral connections, NSCC on delay/ECN/trimming, and RCCC for incast fairness. [NVLink, InfiniBand, and UALink: A Full Guide to How AI GPUs Actually TalkScale-up versus scale-out: where Ultra Ethernet fits next to NVLink, InfiniBand, and UALink.![](https://www.insidedeeptech.com/favicon.ico)Inside Deep Tech](https://www.insidedeeptech.com/nvlink-infiniband-ualink-ai-gpu-interconnect-full-guide/) ## Packet spraying versus flow hashing Classic Ethernet AI fabrics often spray at flow granularity: five-tuple ECMP. That is simple. It is also fragile when a few elephant collective flows collide on the same uplinks for the life of a job. Ultra Ethernet's spraying model changes the entropy **per packet** (within the rules of the delivery mode). Unordered reliable delivery lets the receiver accept packets without reconstructing wire order in a giant buffer, which is what makes aggressive spraying practical. Ordered modes still exist for workloads that require them; they pay the ordering cost. That is the architectural bet: use modern host compute and NIC silicon to track bitmaps and selective retransmission, and use the fabric's many paths as a bandwidth pool instead of a set of sticky pipes. ## How Ultra Ethernet compares to InfiniBand, RoCE, and UALink Do not collapse every "GPU network" slide into one column. | Technology | Primary job | Openness | Typical catch | | -------------------- | ------------------------------ | -------------------------- | ------------------------------------------ | | Ultra Ethernet (UET) | AI/HPC scale-out over Ethernet | UEC multi-vendor spec | Ecosystem maturity vs IB; profile variance | | InfiniBand | Purpose-built HPC/AI fabric | NVIDIA-centric in practice | Capex, ops skill, Ethernet isolation | | RoCEv2 | RDMA over UDP/IP Ethernet | Broad Ethernet vendors | Not UET-native spraying/PDCs | | UALink | Open scale-up accelerator link | UALink Consortium | Not leaf-spine scale-out | | NVLink / NVSwitch | NVIDIA scale-up | Proprietary | Inside domain only | InfiniBand remains the performance and software-maturity reference for many large training fabrics. Ultra Ethernet's claim is not that IB suddenly fails. The claim is that Ethernet economics, optics supply, and multi-vendor switching can absorb AI transport features that used to require a specialized fabric. RoCE already puts RDMA on Ethernet. UET is a different transport design (PDCs, profiles, NSCC/RCCC, native spraying semantics), not a rename of RoCEv2\. Operators evaluating "Ethernet for AI" still need to ask which stack the NIC and switch actually implement. UALink and NVLink answer **scale-up**. Ultra Ethernet answers **scale-out**. Treating them as substitutes is the expensive mistake the interconnect guide already warns about. Optics and cables still sit underneath any of these fabrics. [Co-packaged optics](https://www.insidedeeptech.com/co-packaged-optics-cpo-full-guide/), [linear pluggable optics](https://www.insidedeeptech.com/linear-pluggable-optics-lpo-full-guide/), [active electrical cables](https://www.insidedeeptech.com/active-electrical-cables-aec-ai-data-centers-full-guide/), and [optical circuit switching](https://www.insidedeeptech.com/optical-circuit-switching-ocs-ai-data-centers-full-guide/) change how bits leave the package. They do not replace UET. ## Who is building it: members and early silicon Founding members listed publicly by UEC include AMD, Arista, Broadcom, Cisco, Eviden (Atos), HPE, Intel, Meta, and Microsoft. The consortium later expanded membership broadly (including NVIDIA as a later general member, not a founding steering seat). Steering direction remains with that founding coalition on public UEC pages. On the product side, Broadcom announced **Thor Ultra** on 14 October 2025 as an 800G AI Ethernet NIC it describes as fully feature-compliant with the Ultra Ethernet Consortium specification. The [UEC blog summary](https://ultraethernet.org/uec-steering-member-broadcoms-thor-ultra-800g-nic-what-it-means-for-uec/?ref=insidedeeptech.com) highlights packet-level multipathing, out-of-order delivery to XPU memory, selective retransmit, programmable congestion control, PCIe Gen6 x16, 100G or 200G PAM4 SerDes, and PSP offload encryption. That is an existence proof of UEC-aligned NIC silicon, not a claim that every Ethernet AI NIC is UEC-complete. Host attach still rides PCIe for most NICs. See the [PCIe 6.0 full guide](https://www.insidedeeptech.com/pcie-6-ai-accelerators-full-guide/) for why Gen6 x16 remains the host link even when the fabric itself is Ultra Ethernet or InfiniBand. Switch silicon, optics, and NOS stacks from Arista, Broadcom, Cisco, and others are the other half of interoperability. Spec compliance across NIC and switch is the real test; logo slides are not. [Ultra Ethernet Specification v1.0.3 (PDF)Current UEC specification dated 16 July 2026: software, UET, network, link, and physical layers.![](https://www.insidedeeptech.com/favicon.ico)Inside Deep Tech](https://ultraethernet.org/wp-content/uploads/sites/20/2026/08/UE-Specification-1.0.3.pdf?ref=insidedeeptech.com) ## Honest limits: when InfiniBand or other Ethernet stacks still win Ultra Ethernet fails the wrong buyer for predictable reasons. - You need a production training fabric this quarter with a mature IB software and ops toolchain, and you cannot afford a dual-stack experiment. - Your NICs and switches advertise "AI Ethernet" but only implement RoCE/DCQCN-class behavior, not UET profiles and CMS features you designed for. - You conflate UEC scale-out with UALink/NVLink scale-up and under-buy tray bandwidth. - Multi-vendor compliance testing is incomplete for your profile (especially HPC matching or AI Full deferrable send). - Your congestion plan assumes lossless PFC everywhere; UET's lossy-plus-trim model needs deliberate buffer and TC design. - Security, telemetry, and job scheduling integrations still assume Verbs/QP semantics your cluster software has not abstracted. On the flip side, InfiniBand still wins when a single-vendor fabric, proven in-network offloads, and existing IB ops talent dominate the decision. Proprietary Ethernet AI stacks still win when a hyperscaler or GPU vendor already qualified a closed design end to end. Ultra Ethernet wins when multi-vendor Ethernet supply, optics commonality, and an open transport spec are the constraints you optimize for. ⚖️ Inside Deep Tech's take: Ultra Ethernet is the credible open scale-out Ethernet bet after InfiniBand, not a magic rename of RoCE. Spec 1.0.3 makes the protocol real. Broadcom's Thor Ultra shows silicon following the paper. The operators who win will demand profile-level compliance tests, NSCC/RCCC behavior under incast, and clear separation from scale-up links, not another "Ethernet for AI" slide. ## What to do Monday If you design or buy AI networking: - Read the [UEC 1.0.3 PDF](https://ultraethernet.org/wp-content/uploads/sites/20/2026/08/UE-Specification-1.0.3.pdf?ref=insidedeeptech.com) and the [release notes](https://ultraethernet.org/wp-content/uploads/sites/20/2026/07/UE-Specification-1.0.3-release-notes-.pdf?ref=insidedeeptech.com) before accepting a vendor UE claim. - Ask which UET profile the NIC implements (AI Base, AI Full, HPC) and which CMS modes (NSCC, RCCC, both) are hardware-accelerated. - Test packet spraying and incast under your real collective patterns, not only iperf. - Keep scale-up (NVLink/UALink) and scale-out (UE / IB / RoCE) as separate columns on the rack drawing. - Track optics (CPO, LPO, AEC) as the media layer under whatever transport you pick. The industry did not invent Ultra Ethernet because InfiniBand stopped working. It invented Ultra Ethernet because AI scale-out wanted Ethernet's supply chain with a transport that looks more like an HPC fabric. The teams that win will treat UEC as a compliance target with failure modes, not as a synonym for every 800G Ethernet port. [Read the State of Data Centers 2026 report](https://www.insidedeeptech.com/the-state-of-data-centers-2026/) --- ## FAQ #### What is Ultra Ethernet (UEC)? Ultra Ethernet is the open specification stack from the Ultra Ethernet Consortium for high-performance AI and HPC networking over Ethernet. It spans software, UET transport, network, link, and physical layers. Spec v1.0.3 (16 July 2026) is the current published version. #### How is Ultra Ethernet different from InfiniBand? InfiniBand is a purpose-built fabric with a mature HPC/AI software stack. Ultra Ethernet keeps Ethernet PHYs, switching, and multi-vendor economics while adding UET transport, profiles, spraying, and congestion control aimed at the same backend jobs. They compete for scale-out; they are not identical products. #### How is UET different from RoCE? RoCE carries RDMA over standard Ethernet/IP with established congestion schemes such as DCQCN. UET is a UEC-defined transport with ephemeral PDCs, profiled semantics, native packet-spraying modes, and NSCC/RCCC. Do not treat "RoCE NIC" and "UEC-compliant NIC" as synonyms without a feature matrix. #### What are AI Base, AI Full, and HPC profiles? They are UET feature profiles. AI Base minimizes implementation complexity for AI. AI Full adds deferrable send, exact matching, and atomics. HPC targets MPI-class needs (including wildcard matching) and includes AI Full capabilities except deferrable send. #### What are NSCC and RCCC? NSCC is sender-based congestion control using ECN, RTT/delay, and related network signals. RCCC is optional receiver credit control that allocates send permission to fight incast. Deployments can run either or both. #### Does Ultra Ethernet replace NVLink or UALink? No. NVLink and UALink are scale-up accelerator interconnects inside a node or tray domain. Ultra Ethernet targets scale-out backend fabrics between nodes. You typically need both classes of link in a large AI system. #### Which Ultra Ethernet spec should buyers reference in 2026? As of September 2026, reference Ultra Ethernet Specification v1.0.3 (16 July 2026) from ultraethernet.org, plus the matching release notes for 200G-per-lane signaling and transport/link corrections. --- [Explore more Inside Deep Tech AI infrastructure guides](https://www.insidedeeptech.com/)